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parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 131 i d @ t c = 100c continuous drain current, v gs @ 10v 93 a i dm pulsed drain current 680 p d @t c = 25c power dissipation 200 w linear derating factor 1.3 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy 590 mj i ar avalanche current see fig.12a, 12b, 15, 16 a e ar repetitive avalanche energy mj dv/dt peak diode recovery dv/dt 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torque, 6-32 or m3 screw 10 lbf?in (1.1n?m) hexfet ? power mosfet stripe planar design of hexfet ? power mosfets utilizes the lastest processing techniques to achieve extremely low on-resistance per silicon area. additional features of this hexfet power mosfet are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating. these benefits combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. s d g absolute maximum ratings v dss = 55v r ds(on) = 5.3m ? i d = 131a description www.irf.com 1 thermal resistance parameter typ. max. units r jc junction-to-case ??? 0.75 c/w r ja junction-to-ambient (pcb mount) ??? 40 d 2 pak irf1405spbf to-262 irf1405lpbf irf1405spbf irf1405lpbf advanced process technology ultra low on-resistance dynamic dv/dt rating 175c operating temperature fast switching repetitive avalanche allowed up to tjmax benefits typical applications industrial motor drive

2 www.irf.com parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 55 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.057 ??? v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance ??? 4.6 5.3 m ? v gs = 10v, i d = 101a v gs(th) gate threshold voltage 2.0 ??? 4.0 v v ds = 10v, i d = 250a g fs forward transconductance 69 ??? ??? s v ds = 25v, i d = 110a ??? ??? 20 a v ds = 55v, v gs = 0v ??? ??? 250 v ds = 44v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 200 v gs = 20v gate-to-source reverse leakage ??? ??? -200 na v gs = -20v q g total gate charge ??? 170 260 i d = 101a q gs gate-to-source charge ??? 44 66 nc v ds = 44v q gd gate-to-drain ("miller") charge ??? 62 93 v gs = 10v t d(on) turn-on delay time ??? 13 ??? v dd = 38v t r rise time ??? 190 ??? i d = 110a t d(off) turn-off delay time ??? 130 ??? r g = 1.1 ? t f fall time ??? 110 ??? v gs = 10v between lead, ??? ??? 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 5480 ??? v gs = 0v c oss output capacitance ??? 1210 ??? pf v ds = 25v c rss reverse transfer capacitance ??? 280 ??? ? = 1.0mhz, see fig. 5 c oss output capacitance ??? 5210 ??? v gs = 0v, v ds = 1.0v, ? = 1.0mhz c oss output capacitance ??? 900 ??? v gs = 0v, v ds = 44v, ? = 1.0mhz c oss eff. effective output capacitance ??? 1500 ??? v gs = 0v, v ds = 0v to 44v nh electrical characteristics @ t j = 25c (unless otherwise specified) l d internal drain inductance l s internal source inductance ??? ??? s d g i gss ns 4.5 7.5 i dss drain-to-source leakage current s d g parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source c urrent integral reverse (body diode) ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.3 v t j = 25c, i s = 101a, v gs = 0v t rr reverse recovery time ??? 88 130 ns t j = 25c, i f = 101a q rr reverse recoverycharge ??? 250 380 nc di/dt = 100a/s t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) source-drain ratings and characteristics 131 680

www.irf.com 3 fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics 1 10 100 1000 0.1 1 10 100 20s pulse width t = 25 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 10 100 1000 0.1 1 10 100 20s pulse width t = 175 c j top bottom vgs 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v 4.5v v , drain-to-source voltage (v) i , drain-to-source current (a) ds d 4.5v 1 10 100 1000 4 6 8 10 12 v = 25v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 169a

4 www.irf.com fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 60 120 180 240 300 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs for test circuit see figure i = d 13 101a v = 27v ds v = 44v ds 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 25 c j t = 175 c j 1 10 100 1000 10000 1 10 100 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd

www.irf.com 5 fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature v ds 90% 10% v gs t d(on) t r t d(off) t f
1 0.1 %
+ - fig 10a. switching time test circuit fig 10b. switching time waveforms 25 50 75 100 125 150 175 0 40 80 120 160 t , case temperature ( c) i , drain current (a) c d limited by package 0.001 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)

6 www.irf.com q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + -
fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v fig 14. threshold voltage vs. temperature 25 50 75 100 125 150 175 0 200 400 600 800 1000 1200 1400 starting t , junction temperature ( c) e , single pulse avalanche energy (mj) j as i d top bottom 41a 71a 101a -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.5 2.0 2.5 3.0 3.5 4.0 v g s ( t h ) , v a r i a c e ( v ) i d = 250a

www.irf.com 7 fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-07 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 500 600 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 10% duty cycle i d = 101a

8 www.irf.com
p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - ? ?

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www.irf.com 9
dat e code ye ar 0 = 2000 we e k 0 2 a = as s e mb l y s i t e code rectifier international part number p = de s i gnat e s l e ad - f r e e product (optional) f530s in the assembly line "l" as s embled on ww 02, 2000 this is an irf530s with lot code 8024 international logo rectifier lot code assembly year 0 = 2000 part number dat e code line l week 02 or f530s logo as s e mb l y lot code

notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/

10 www.irf.com to-262 part marking information to-262 package outline dimensions are shown in millimeters (inches) logo rect ifier internat ional lot code as s e mb l y logo rectifier int ernational dat e code week 19 ye ar 7 = 1997 part number a = assembly site code or product (optional) p = de s i gnat e s l e ad- f r e e e xample : t his is an irl3103l lot code 1789 assembly part numb e r dat e code week 19 line c lot code ye ar 7 = 1997 as s e mble d on ww 19, 1997 in the assembly line "c" notes: 1. for an automotive qualified version of this part please see http://www.irf.com/product-info/auto/ 2. for the most current drawing please refer to ir website at http://www.irf.com/package/

www.irf.com 11 repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). starting t j = 25c, l = 0.11mh r g = 25 ? , i as = 101a. (see figure 12). i sd 101a, di/dt 210a/s, v dd v (br)dss , t j 175c pulse width 400s; duty cycle 2%.
c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . calculated continuous current based on maximum allowable junction temperature. package limitation current is 75a. limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this is applied to d 2 pak, when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 07/2010 dimensions are shown in millimeters (inches) 3 4 4 trr feed direction 1.85 (.073) 1.65 (.065) 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) trl feed direction 10.90 (.429) 10.70 (.421) 16.10 (.634) 15.90 (.626) 1.75 (.069) 1.25 (.049) 11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601) 4.72 (.136) 4.52 (.178) 24.30 (.957) 23.90 (.941) 0.368 (.0145) 0.342 (.0135) 1.60 (.063) 1.50 (.059) 13.50 (.532) 12.80 (.504) 330.00 (14.173) max. 27.40 (1.079) 23.90 (.941) 60.00 (2.362) min. 30.40 (1.197) max. 26.40 (1.039) 24.40 (.961) notes : 1. comforms to eia-418. 2. controlling dimension: millimeter. 3. dimension measured @ hub. 4. includes flange distortion @ outer edge.

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